Cyclic Code Encoder

To encode a #Cyclic Code, we need to construct a circuit including components such as a gate, flip-flop (a register that store value), and modulo-2 adder (or simply a XOR logic gate). Each flip-flop represents \(g_i\) from Generator Polynomial# where \(0 < i < n - k\), and to their right, there should be a modulo-2 adder connected to it depending on the value of \(g_i\). If \(g_i\) is 0, this indicates that there is no connection (otherwise it is a direct connection), thus no modulo-2 adder should be installed to the right of the flip-flop \(g_i\). Initially, all flip-flops store a value of 0, and after the end of each shift round, the value will be shifted to the right. The gate should be connected to the first flip-flop and the last flip-flop. The input will be coming from the right to the left.

Note: The least significant bit from message will be evaluated first.

Note: We can verify the number of flip-flops needed by calculating the parity bits \(m = n - k\) for the cyclic code.

See Cyclic Code Decoder# to see how to decode cyclic code in low level.

Links to this page
#encoding #hardware